The digital electronics industry is migrating to lower operating voltages, but systems are performing at increasing speeds. High-speed bus switches arc needed in these systems to keep the data moving fast. Hence, crossbar switches that operate at lower voltages will be required in future systems while still being able to connect to the high voltage buses. There is desired a way to interface a 5V bus with a 3.3V bus, using a high-speed bus switch that operates with a 3.3V power supply. In addition, there is desired control circuitry that does not consume much power and controls the device behavior during a power-sequencing event. This would eliminate the need for special power-sequencing circuitry in the system design which results in a less expensive system.
A basic low voltage CMOS crossbar switch is shown as circuit 10 in FIG. 1. This circuit 10 is typical of the input/output configuration of a low voltage bus switch which is a N-channel pass transistor MN1 in parallel with a P-channel pass transistor MP1. The gates of the pass transistors are driven by complementary signals generated by the output enable circuit signal OE. Thus, the switch 10 will be closed when the gate voltage of transistor MN1 is high and the gate voltage of transistor MP1 is low. Likewise, the bus switch 10 will be open when the gate voltage of transistor MN1 is low and the gate voltage of transistor MP1 is high. Since both pass transistors will be turned on when the switch 10 is enabled, the output voltage at node B will match the input voltage at node A without a voltage drop across the switch 10. Also, transistors MP3 and MP4 are a part of a power-down control circuit that will keep the bus switch 10 open during a power-sequencing event.
A problem with this prior art implementation occurs when one of the I/O ports (A or B) is connected to a 5V bus. The Dref signal that controls blocking transistors MP3 and MP4 will be approximately equal to Vcc or 3.3V in this case. If the bus switch is enabled, then transistor MN2 is on which pulls the gate of transistor MP1 low. However, if one of the I/O ports is connected to a 5V bus that is high, then the corresponding blocking transistor, MP3 or MP4, will turn on because its source voltage is a Vtp higher than its gate voltage. This creates a leakage path from the 5V bus through the blocking transistor and MN2 to ground which causes the device to no longer function properly.
The crossbar switch shown in FIG. 1 would still have a problem connecting to a 5V bus even if the leakage path to ground could be blocked. The transmission gate implementation of the low voltage bus switch would allow a high voltage on the 5V bus to be directly connected to the 3.3V bus which may or may not be 5V input tolerant. Therefore, there must be some voltage level translation in any bus switch that connects a 5V bus and a 3.3V bus. This could be accomplished with the use of a charge pump and a N-channel pass transistor. The problem with the charge pump solution is that the power supply current (Icc) is much higher which is very undesirable for notebook applications.